Recently the techniques for downsizing IC chips, achieving higher performances, and increasing packaging density and the number of pins progress remarkably. On the other hand, an electrode pitch of a chip has become narrower and narrower because of the downsized chip and the increased pins.
If an electrode array has a decreased pitch, high precision is required in the mounting of a chip on an interposer or printed wiring board. This results in undesirable increased costs for facilities. Hence, the electrodes arranged around the chip at a small pitch need be re-arranged on the chip to increase the electrode pitch, so as to facilitate the subsequent mounting process.
In order to re-arrange the electrodes, conductor wirings need be formed on a chip surface on which the electrodes are formed. It has been a conventional practice to form the wirings by a vapor deposition process, which results in cost increase. On the other hand, it is necessary to form bumps on the re-arranged electrodes. The formation of the bumps entails high cost.
The invention is directed to a solution to the above problem of the prior art and has an object to provide means to permit the wirings to be formed on the semiconductor in an economical and highly precise manner as well as to permit the bumps to be formed on the electrodes in a highly precise and inexpensive manner.